Grain-Structure Engineering for Thermal Transport and Stress Control in 3D Interconnects

As 3D interconnect dimensions continue to shrink, the grain structure of interconnect materials becomes an important design variable governing both thermal transport and thermomechanical reliability. In Cu-filled TSVs and other fine-pitch interconnects, grain size, grain-boundary density, crystallographic texture, and twin structures can strongly influence mechanical strength, grain growth, thermal stability, and heat transport. Thermal processing can drive grain growth and recrystallization, reducing grain-boundary density and yield strength, while the coefficient-of-thermal-expansion mismatch between the interconnect and surrounding materials can generate substantial thermomechanical stress. Our research seeks to understand these coupled microstructure–transport–mechanics relationships and use grain structure as an engineering variable rather than treating it as a passive consequence of fabrication.

A particular focus is on grain and twin-boundary engineering in scaled 3D interconnects. Nanotwinned structures provide a model platform because coherent twin boundaries can impede grain-boundary migration and alter grain-growth kinetics under geometric confinement. Recent work demonstrates that nanotwinned Cu TSVs can retain stable columnar grains and high densities of coherent twin boundaries during thermal annealing, while conventional Cu exhibits more rapid and uniform grain growth. We combine advanced electroplating, microstructural characterization, and modeling to control grain morphology, boundary structure, and crystallographic texture, with the goal of mitigating thermomechanical stress while maintaining or enhancing thermal transport. This approach provides a materials-level pathway toward more thermally stable and mechanically robust interconnects for next-generation high-density 3D integration.