Chen Lang received his Bachelor of Engineering degree from Kunming University of Science and Technology and is currently pursuing his PhD degree under the supervision of Prof. Wang Wei at Peking University. During his PhD, he has focused on 3D integrated packaging processes and their reliability analysis, and his creation of the P-eSiFO process has for the first time enhanced the interconnection of heterogeneous chips to the node of 2um, and flexible hybrid microsystems is also one of his research interests. Outside of work, Chen enjoys long-distance running and working out.